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The opportunity addressed under this activity is the offering of a powerful and in-orbit reprogrammable On-Board Signal Processing (OBSP) platform with reduced accommodation burden and moderate economic costs. It will allow communications services in LEO to energy-limited microsatellites.
The key challenge of the project is demonstrating the robustness of the commercial FPGA during launch and in LEO space environment. To reach this goal, test set-ups are developed to perform reliability tests, mounting qualification tests and radiation tests.
The main differentiating elements offered by the targeted product are:
The data relay modem has an RF interface in L-band. The modulator features downlink data rates up to 300 Mbps using O/QPSK modulation with a TX bandwidth of 405 MHz, while the demodulator features uplink data rates up to 2 Mbps using QPSK modulation with an RX bandwidth of 4 MHz. All CCSDS standard LDPC coding schemes and encapsulation schemes can be supported. The modem also supports high-gain antenna tracking functions.
The high level of FPGA integration is first an enabler for powerful and demanding algorithms: advanced coding layers (LDPC, Turbo-codes), spectral monitoring, authentication and encryption, as well as unified digital architectures such as putting all demodulator and modulator functions in one equipment. Also the SEU protection mechanisms are a lot more flexible in terms of cost to the customer. On top of those key advantages, the power-to-function ratio scales according to the level of integration, which can be used to fit demanding algorithms in challenging power envelopes.
To leverage this digital flexibility, and enable new applications without requiring a redesign in the digital hardware part of the system, it is organised so that only a redesign of the RF part is necessary. This RF section itself contributes to overall flexibility, being designed around subsampling data converters.
Another asset of this product is its in-flight re-programmability as driven by market demand. Based on the fact that the SRAM-based FPGA is natively reprogrammable because of its need to be loaded at each boot time, Antwerp Space developed reliable upgrade procedures.
The equipment is designed to be powered from a 28V bus with a maximum power consumption of 35W. For a cold redundant unit the mass budget is 3.6 kg, and the volume budget is 3.8 l.
The equipment is divided into primary power supply conditioning done in the PSU board, RF signal processing functions and digital processing functions.
The activity subject of this Artes 5.2 contract fits within the broader scope of the overall development program called ‘ARGO’. The three components of this program, overlap with some mutual interaction.
The overall ARGO project development process adheres to the recommended life cycle for a Space product development, wherein:
The objectives of the Artes 5.2 contract to develop an On-board Signal Processing Platform have been successfully achieved.