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DTP NG project deals with the development and qualification of the next generation of Digital Transparent Processor (DTP) based on 28nm ASIC and optical high speed serial links technologies. Such DTPs will be able to process up to 2500 MHz useful band per access and to present high modularity for offering more than 360 GHz routing capacity compatible with applications ranging from FSS/BSS, HTS & V-HTS needs.
The main function of the DTP is to perform transparent and flexible routing between input and output RF ports in C band with a complete flexibility in frequency plan.
The keys drivers of DTP development are linked to the introduction of new technologies needed to reach the overall performances, mainly :
To best answer the satellite operator’s expectations, payload integrating a digital core based on Digital Transparent Processor (DTP) is very promising whatever the targeted final applications (mobile applications, individual fixed access through VSAT, backhauling, …). Indeed, when translated into high level mission requirements, those various services and applications are leading to very similar needs at operators level :
New generation of DTP able to process up to 360 GHz offers a real improvement for the new generation of highly capacitive broadband Satcom solutions. Through the ability to digitally process the whole band implemented over the service area, this new generation of DTP enables a large field of possibilities to operate those satellites by fine tuning of frequency allocation to beams and taking full benefits of highly versatile routing capabilities between gateways and user-beams.
The main features of new generation DTP unit are as follows:
DTP architecture is based of 5 functional blocks :
Spaceflex DTP project plan is defined as follow :
Preliminary design conception
Detailed design activities
In parallel, all standard reviews (PDR/CDR/MRR/TRR/TRB/QR) associated to product development lifecycle are covered by the project activities.
To date, Spaceflex DTP development phase is completed. Associated key technologies (28 nm ASIC, optical links, mounting processes, thermal management…) are fully qualified. A (8 inputs x8 outputs) Engineering Model has been manufactured and successfully tested. The Qualification Model is fully integrated and currently under qualification tests. On board Software is validated and qualified. In parallel, several flight models (up to 120x120) are in production.