European Space Agency

LOW VOLTAGE, HIGH CURRENT POWER CONVERTER FOR HIGH POWER INTEGRATED CIRCUITS (ARTES AT 5C.410)

Status

ISSUED

EMITS REFERENCE

Program

CC-AT 4.0.1

Price Range

> 500 KEURO

Description

The objective of the activity is to design, manufacture and test a power converter with low output voltage and high output current capability to fulfil the needs of high power integrated circuits (including ASICs, FPGAs and micro-processors) as needed for on-board payload processors and computers.

Targeted Improvements: Enabling a European source of power converters with an outputvoltage lower than 1.2 V and an output current higher than 50 A, with an increase in the end-to-end efficiency of at least 5%.

Description:

As new generations of high throughput satellites aim at providing more capacity, manufacturers explore methods to improve theperformance of the key digital processing modules. A usual way to increase performance of the key components, such as Field Programmable Gate Arrays (FPGA), application-specific integrated circuits (ASICs) and microprocessors, is to increase their clock frequency, leading to exponentially increasing power consumption. To counteract this problem, a typical solution is to reduce the supply voltage.

The final result is that the newest devices need very low voltages and high currents (<1V, 50A) on the supply line. This combination is one of the worst possible for DC/DC converters and it is technically challenging to achieve high performance under theseconditions. This issue has been solved in terrestrial applications, where high performance multi-core microprocessors have even more demanding power supply requirements. This provides extensive evidence that multi-phase buck converters can achieve the performanceneeded for space applications when the appropriate technologies and techniques are used. However, today there is no European sourceforthis type of DC/DC converter.

This activity will address the design, development and test of a DC/DC converter capable of addressing the needs of modern digital components, by selecting an appropriate topology and suitable components and integrating techniques.

Tender Specifics